There is a strong incentive to provide a high mobility backplane for X-ray imagers based on a-Si photodiodes (PD). The major problem is to achieve a high pixel count, real time image above 10 frames per second, since the existing a-Si TFT backplane suffers from low mobility (<1 cm2/Vs) and limited time to transfer charges from the image pixel to a peripheral readout chip. In this prior art system, 4 or more pixels must be “binned” together to comprise a faster frame time. The switch resistance of each individual switch is on the order of mega-ohms. Poly-Si TFT technology van fit the gap in mobility, but poly-Si TFTs suffer from high leakage current and non-uniformity in the leakage current and in TFT threshold voltage. Single crystalline Si imagers have been fabricated and stitched together to satisfy high end applications, but the cost of crystalline Si imagers is prohibitive for general digital radiology in the medical field.
There has been a lot of progress in metal oxide thin film transistors (MOTFT) both in mobility and reliability. Mobility beyond 50 cm2/Vs has been demonstrated, for example, in U.S. Pat. No. 9,356,156, entitled “Stable High Mobility MOTFT and Fabrication at Low Temperature”, issued May 31, 2016 and incorporated herein by reference. Also, because of the larger bandgap in the metal oxide material forming the channel of the TFT, leakage current lower than fA can be easily achieved. Further, in a preferred embodiment the metal oxide material in the channel is nanocrystalline or amorphous, whereby uniformity is insured because the number of grains in the device channel area is larger and associated fluctuations between devices in an array of devices caused by a small number of grains is avoided.
MOTFTs can provide an ideal high mobility backplane for a-Si photodiode imagers. The key challenge remains in the fabrication compatibility between a-Si PN or PIN photodiode technology and the MOTFT technology. Throughout this disclosure the term “photodiode” or “PD” is defined to include both pn diodes and PIN diodes. There are basically two ways to fabricate a MOTFT backplane/a-Si photodiode imager. One way is to fabricate an a-Si photodiode imager on a glass substrate first and then fabricate a MOTFT pixel readout circuit on the photodiode imager, as disclosed, for example, in U.S. Pat. No. 8,962,377, entitled “Pixelated Imager with MOTFT and Process”, issued Feb. 24, 2015, and incorporated herein by reference. The advantage in such an approach is that the MOTFTs will not have to survive the PECVD process used in the formation of a-Si photodiodes and in the SiN passivation (since the a-Si photodiodes are formed first). On the other hand, the a-Si photodiodes have to survive the MOTFT fabrication process. The a-Si photodiodes can survive below 250° C. well, therefore the MOTFT process is constrained to below 250° C. Also, the thickness of the a-Si photodiodes and the thickness of the PECVD passivation layer are very thick and it is important to have a low thermal budget below 250° C. for the MOTFT process to prevent cracking of the a-Si photodiodes during the thermal processing of the MOTFTs.
The other approach is to fabricate the MOTFT backplane first and then integrate the a-Si photodiode imager over the MOTFT backplane. In this approach, the MOTFT fabrication is no longer constrained to below 250° C. More process options can be adopted. However, the key challenge to this approach is that the MOTFTs have to survive the fabrication process for the a-Si photodiode array and its passivation. In the a-Si photodiode fabrication process, the deposition of the a-Si photodiodes and the SiN passivation film are typically performed at elevated temperatures (around 200° C. to 250° C.). There is a large amount of hydrogen in the ambient during the deposition of both the a-Si and the SiN. The hydrogen in the ambient at high temperature (200° C. to 250° C.) can destroy the MOTFT performance. The effect is even more severe for high performance MOTFT (e.g. with mobility >20 cm2/Vs).
One way to prevent the destruction of the MOTFTs is to create a good hydrogen barrier as described, for example, in co-pending U.S. patent application Ser. No. 15/188,762, entitled “Insulator/Metal Passivation of MOTFT”, filed Jun. 21, 2016, and incorporated herein by reference.
It would be highly advantageous, therefore, to remedy the foregoing and other deficiencies inherent in the prior art and/or to improve the fabrication process.
Accordingly, it is an object of the present invention to provide a new and improved process for the recovery of MOTFTs in a MOTFT backplane after the fabrication of an a-Si photodiode imager and passivation film thereon.
It is another object of the present invention to provide a new and improved process for fabricating an a-Si photodiode imager on a MOTFT backplane.
It is another object of the present invention to provide a new and improved structure including a MOTFT backplane and a-Si photodiode imager wherein the MOTFTs in a MOTFT backplane are recovered after the fabrication of an a-Si photodiode imager and passivation film on the backplane.